The vertical replacement-gate (VRG) MOSFET

نویسندگان

  • J. M. Hergenrother
  • Sang-Hyun Oh
  • T. Nigam
  • D. Monroe
  • F. P. Klemens
  • A. Kornblit
چکیده

We have fabricated and demonstrated a new device called the vertical replacement-gate (VRG) MOSFET. This is the first MOSFET ever built in which: (1) all critical transistor dimensions are controlled precisely without lithography and dry etch, (2) the gate length is defined by a deposited film thickness, independently of lithography and etch, and (3) a high-quality gate oxide is grown on a single-crystal Si channel. In addition to this unique combination, the VRG-MOSFET includes self-aligned source/drain extensions (SDEs) formed by solid source diffusion (SSD), small parasitic overlap, junction, and source/drain capacitances, and a replacement-gate approach to enable alternative gate stacks. We have demonstrated nMOSFETs with an initial VRG process, and pMOSFETs with a more mature process. Since both sides of the device pillar drive in parallel, the drive current per lm of coded width can far exceed that of advanced planar MOSFETs. Our 100 nm VRG-pMOSFETs with tOX 1⁄4 25 A drive 615 lA/lm at 1.5 V with IOFF 1⁄4 8 nA/lm—80% more drive than specified in the 1999 ITRS Roadmap at the same IOFF. Our 50 nm VRGpMOSFETs with tOX 1⁄4 25 A approach the 1.0 V roadmap target of ION 1⁄4 350 lA/lm at IOFF 1⁄4 20 nA/lm without the need for a hyperthin (<20 A) gate oxide. We have described a process for integrating n-channel and p-channel VRGMOSFETs to form side-by-side CMOS that retains the key VRG advantages while providing packing density and process complexity that is competitive with traditional planar CMOS. All of this is achieved using current manufacturing methods, materials, and tools, and high-performance devices with 50 nm physical gate lengths (LG) have been demonstrated with precise gate length control without advanced lithography. 2002 Published by Elsevier Science Ltd.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A Novel Hybrid Nano Scale MOSFET Structure for Low Leak Application

In this paper, novel hybrid MOSFET(HMOS) structure has been proposed to reduce the gate leakage current drastically. This novel hybrid MOSFET (HMOS) uses source/drain-to-gate non-overlap region in combination with high-K layer/interfacial oxide as gate stack. The extended S/D in the non-overlap region is induced by fringing gate electric field through the high-k dielectric spacer. The gate leak...

متن کامل

Design of a Resonant Suspended Gate MOSFET with Retrograde Channel Doping

High Q frequency reference devices are essential components in many Integrated circuits. This paper will focus on the Resonant Suspended Gate (RSG) MOSFET. The gate in this structure has been designed to resonate at 38.4MHz. The MOSFET in this device has a retrograde channel to achieve high output current. For this purpose, abrupt retrograde channel and Gaussian retrograde channels have bee...

متن کامل

Design and Optimization Approaches in Double Gate Device Architecture

According to Moore’s law, the number of transistor embedded on integrated circuit (IC) doubles approximately every two years. Thus, the size of Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) has to be scaled down as an increase in packing density. In current technology, the size of a transistor has shrunk below 45nm, and it has already reached its physical limit. Any attempt to shri...

متن کامل

Impact of Height of Silicon Pillar on Vertical DG-MOSFET Device

Vertical Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is believed to suppress various short channel effect problems. The gate to channel coupling in vertical DG-MOSFET are doubled, thus resulting in higher current density. By having two gates, both gates are able to control the channel from both sides and possess better electrostatic control over the channel. In o...

متن کامل

Investigation of pillar thickness variation effect on oblique rotating implantation (ORI)-based vertical double gate MOSFET

The rapid scaling of integrated circuit requires further shrinkage of lateral device dimension, which correlates with pillar thickness in vertical structure. This paper investigates the effect of pillar thickness variation on vertical double gate MOSFET (VDGM) fabricated using oblique rotating ion implantation (ORI) method. For this purpose, several scenarios of silicon pillar thickness tsi wer...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2002